x86 is the generic name of an architecture of
microprocessors first developed by
Intel.
History
The x86 architecture first appeared inside the
Intel 8086 CPU in
1978. It was adopted (in the simpler
8088 version) three years later as the standard CPU of the
IBM PC. The PC's enormous success during the last 20 years has guaranteed that the x86 architecture that became the most popular CPU architecture ever. See also
Intel.
Design
It can be generalized that the x86 architecture is CISC with variable instruction length. However most of its aspects evolved through the years, while retaining backwards compatibility.
Real mode
Intel 8086 and
8088 had 14 16-bit registers. Four of them (AX, BX, CX, DX) were general purpose (although each had also an additional purpose; for example only CX can be used as a counter with the
loop instruction). Each could be accessed as two separate bytes (thus BX's high byte can be accessed as BH and low byte as BL). In addition to them, there are 4 segment registers (CS, DS, SS and ES). They are used to form a memory address. There are 2 pointer registers (SP which points to the bottom of the stack, and BP which can be used to point at some other place in the stack or the memory). There are two index registers (SI and DI) which can be used to point inside an array. Finally, there are the flag register (containing flags such as carry
?, overflow
?, zero and so on), and the instruction pointer (IP) which points at the current instruction. Both can't be changed directly.
In real mode, memory access is segmented. This is done by shifting the segment address left by 4 bits and adding an offset in order to receive a final 20-bit address. Thus the total address space in real mode is 220 bits, or 1 MB, quite an impressive figure for 1978. There are two addressing modes: near and far. In far mode, both the segment and the offset are specified. In near mode, only the offset is specified, and the segment is taken from the appropriate register. For data the register is DS, for code is CS, and for stack it is SS. For example, if DS is A000h and SI is 5677h, DS:SI will point at the absolute address DS × 4 + SI = A5677h.
In this scheme, two different segment/offset pairs can point at a single absolute location. Thus, if DS is A111h and SI is 4567h, DS:SI will point at the same A5677h as above. In addition to duplicacy, this scheme also makes it impossible to have more than 4 segments at once. Moreover, CS, DS and SS are vital for the correct functioning of the program, so that only ES can be used to point somewhere else. This scheme, which was intended as a compatibility measure with the [Intel 8085]? has caused no end to the grief of programmers.
In addition to the above-said, the 8086 also had 64K of 8-bit (or alternatively 32K of 16-bit) I/O space, and support for up to 255 interrupts. The interrupts can cascade, using the stack to store the return address.
Manufcaturers
x86 and compatibles are manufactured by:
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